specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage conditi on (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 92111 sy 20110909-s00003 no.a1979-1/8 LV5636VH overview LV5636VH integrates 1ch dc/dc boost converter and 1ch ldo. it is suitable as the power supply for bs/cs antennas of lcd/pdp tv and bd recorders that require automatic recovery without ic destruction and malfunction when the output is short-circuited. functions dc/dc boost converter ? soft-start time: 2.6ms ? ? pulse by pulse over-current limiter ? ? over-current limiter (fold back) all ? under-voltage lockout ? ? power good ? ? output voltage setting resistor ? specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit v cc maximum supply voltage v cc max -0.3 to 25 v ldoin maximum input voltage v ldoin max -0.3 to 30 v sw maximum voltage v sw max -0.3 to 30 v allowable power dissipation pd max *1 1.45 w operating temperature topr -30 to 85 c operating junction temperature tjopr -30 to 125 c storage temperature tstg -40 to 150 c *1: when mounted on the specified printed circuit board (32.0mm 38.0mm 1.6mm), glass epoxy, double sides board caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of th e ic may be degraded. please contact us for the further detai ls. bi-cmos integrated circuit for bs/cs antennas dc/dc converter orderin g numbe r : ena1979
LV5636VH no.a1979-2/8 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit v cc supply voltage v cc 8 to 23 v ldoin input voltage v ldoin 8 to 28 v sw voltage v sw -0.3 to 28 v en voltage v en 0 to 23 v electrical characteristics at ta = 25 c, v cc = 12v, v en =v ctl =2v parameter symbol conditions ratings unit min typ max all supply current i cc switching is turned off 2.1 4.0 ma i off en=0v, ldoin=0v 10 a reference voltage vref 1.26 v ldo output voltage ldoout1 ctl=high (-2%) 15.9 (2%) v ldoout2 ctl=low (-2%) 11.7 (2%) v dcdc output voltage dcdcout1 ctl=high (-2%) 16.5 (2%) v dcdcout2 ctl=low (-2%) 12.3 (2%) v enable voltage v en 2.0 v disable voltage v dis 0.4 v en input current i en v en =2.0v 10 a pgood threshold v pg power-good output is ?good? when ldo is 85% or higher of the setting value. 85 % pgood sink current i pg where power-good output is ?no good? and v pgood =0.5v. 1.0 ma pgood leak current i pg lk where power-good output is ?good? and v pgood =2v 10 a pgdly source current i pgdly 3.84 4.8 5.76 a pgdly threshold v pgdly 1.26 v ctl high voltage v ctl h 15v output setting 2.0 v ctl low voltage v ctl l 11v output setting 0.4 v ctl input current i ctl v ctl =2v 20 a uvlo on voltage v uvlo 7.0 v thermal shutdown temperature ttsd *2 155 c tsd hysteresis thys *2 30 c dc/dc boost converter fb output voltage ?low? fb low in=2.0v, i fb =-20a (sink) 0.2 v fb output voltage ?high? hb high in=2.0v, i fb =20a (source) 1.8 v soft-start time tss 2.6 ms oscillator frequency f osc 1 mhz max on duty d max 85 % sw on resistance r on 0.7 ? sw peak current i pk 1.8 a scp timer t scp 1.6 ms ldo maximum output current io max 450 620 800 ma line regulation r ln 16.5v ? ldoin ? 21.5v 20 mv load regulation r ld 10ma ? i o ? 300ma 50 mv dropout voltage v drop i o =400ma 0.35 0.5 v short current i short ldoout=gnd 100 ma *2: design guarantee value.
LV5636VH no.a1979-3/8 package dimensions unit : mm (typ) 3313 specified board (32mm38mm1.6mm, glass epoxy, double side board) sanyo : hssop14(225mil) 6.5 6.4 4.4 0.22 0.65 1.3 (2.35) 1.5 17 8 14 0.1 1.5max (1.3) 0.5 0.15 pd max -- ta 0 1.5 1.0 0.5 2.0 --30 90 60 30 0 120 1.45 0.58 ambient temperature, ta -- c allowable power dissipation, pd max -- w specified circuit board:32mm mm mm 3 glass epoxy board(both sides)
LV5636VH no.a1979-4/8 block diagram and a pplication circuit start and stop output waveform during start and stop is shown below. v cc in fb pgood pgdly en sw ldoin ldoout 15v/11v control vreg 12 5 6 8 9 11 14 2 1 vref + - + osc - + soft start p by p scp uvlo tsd pgood - + ilimit ctl 10 7 sgnd pgnd c2 l1 d1 dc/dc boost converter dc/dc out=16.5v/12.3v ldo ldoout=15.9v/11.7v i o =400ma c1 c4 v cc =12v r1 c5 c6 r2 dc/dcout (ldoin) r3 c7 c3 ctl=h: 15v setting ctl=l: 11v setting 16.5v 15.9v 12v(=v cc ) 0v en 4.0ms soft start 2.6ms dc/dc boost output ldo output
LV5636VH no.a1979-5/8 pin arrangement pin function pin no. pin name function equivalent circuit 1 2 7 ldoout ldoin sgnd ldo output ldo input signal ground 1 2 7 sgnd ldoout ldoin 5 in dc/dc error amplifier input 5 7 sgnd in ldoin 6 fb dc/dc error amplifier output 6 7 sgnd fb 8 pgood power good output 7 sgnd 8 pgood continued on next page. 2 ldoout 3 4 5 6 7 13 sw 12 ldoin nc 11 nc v cc 10 nc en 9 in ctl 8 fb pgdly top view 1 14 sgnd pgood pgnd pgnd fin fin
LV5636VH no.a1979-6/8 continued from preceding page. pin no. pin name function equivalent circuit 9 pgdly pgdly capacitor connection pin for delay time setting 9 7 sgnd pgdly 10 ctl 15v, 11v output voltage switching 10 7 sgnd ctl vreg 11 12 en v cc enable power supply 11 7 sgnd en 12 v cc 14 fin sw pgnd dc/dc open drain output power ground 14 fin pgnd sw vreg
LV5636VH ps no.a1979-7/8 function overview (1) uvlo (under voltage lockout) uvlo stops outputs of both dc/dc and to ldo to prevent malfunction when v cc decreases. uvlo operates when v cc falls below the uvlo voltage. this function is a non-latch-type, and recovers these outputs automatically when v cc exceeds the uvlo voltage. (2) power good power good notifies that the output voltage of ldo is within the range of the setting voltage. the output is judged to be ?power good? when both outputs are 85% or higher compared to the setting voltages. if the output voltage falls below 85%, pgood output becomes h l (no good). at ?good? ?no good?, delay time can be set. it explains this at (3). when en=l (off), pgood output is h. [ power good circuit diagram] (3) power good delay if the output voltage of ldo falls below 85%, charge at 4.8 a constant starts to pgdly capacitor for delay time setting. when pgdly voltage exceeds the threshold volta ge (=vref), pgood voltage reaches to the threshold voltage, pgdly capacitor us ing the following formul a because delay time (t pgdly ) depends on capacitance. c pgdly = (i pgdly t pgdly ) / vref [pgdly circuit diagram] + - pgdly vref*85% ldo feed back voltage p.good comp. power good delay block (at good no good , p.good comp. output is delayed) good no good h output l output pgood pin (example) power supply (6v or less) 85% t pgdly vref pgood pgdly pin c pgdly for delay time setting discharge tr. (when p.good comp. is no good, discharge tr. is off) pgdly comp. en ldo output pgdly voltage pgood output pgdly capacitor is discharged. pgood output becomes h l(no good) when en=l (off), pgood output is h. time threshold voltage(vref)
LV5636VH ps no.a1979-8/8 (4) pulse-by-pulse over current protection (p by p) the p by p stops switch-on operation of a certain cycle by force when the current of power mosfet reaches the maximum output peak current. [p by p circuit diagram] (5) short circuit protector (scp) when output voltage of dc/dc decreases due to short-circ uit; for example, scp latches off the outputs of dc/dc and ldo by timer. when output voltage of dc/dc decreases an d fb that is the error amplifier output turns to h, the internal counter starts, latch-off occurs after 1.6ms. to restart the output after latch-off, you need to input en signal again. (6) output voltage switching function where ctl=high, 15v output setting is selected. where ctl=low, 11v output setting is selected. sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliab ility pr oducts, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these pr obab ilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. logic error amp. pwm comp. triangular wave p by p comp. power sw pin if the peak current > 1.8a, switching_on operation during the cycle stops compulsorily the current of power_tr. is constantly monitored. this catalog provides information as of september, 2011. specifications and information herein are subject to change without notice.
|
